CS43130 Datasheet, PDF (112/137 Pages) Cirrus Logic – 130-dB, 32-Bit High-Performance DAC with Integrated Headphone Driver

CS43130
7.5 Headphone and PCM Registers
7.5.8
R/W
Default
HP Detect
7
6
HPDETECT_CTRL
0
0
Address 0xD0000
5
4
3
2
1
0
HPDETECT_
INV
HPDETECT_RISE_DBC_TIME HPDETECT_FALL_DBC_TIME
—
0
0
0
1
0
0
Bits
Name
Description
7:6 HPDETECT_ HP detect control. Configures operation of the HP detect circuit. The internal weak current source pull-up is enabled in
CTRL
all modes.
00 (Default) Disabled. The HP detect digital circuit is powered down and does not report to the status registers
(HPDETECT_PLUG_INT and HPDETECT_UNPLUG_INT are also cleared).
01–10 Reserved
11 Enabled
5 HPDETECT_ HP detect invert. Can be used to invert the signal from the HP detect circuit.
INV
0 (Default) Not inverted
1 Inverted
4:3 HPDETECT_ Tip sense rising debounce time.
RISE_DBC_
TIME
00 (Default) 0 ms
01 250 ms
10 500 ms
11 1.0 s
2:1 HPDETECT_ Tip sense falling debounce time.
FALL_DBC_ _{00 0 ms}
TIME
01 250 ms
10 (Default) 500 ms
11 1.0 s
0
—
Reserved
7.5.9 HP Status
R/O
7
6
5
4
—
HPDETECT_ HPDETECT_
PLUG_DBC UNPLUG_DNC
Default
0
0
0
0
Address 0xD0001
3
2
1
0
—
0
0
0
0
Bits
Name
Description
7
—
Reserved
6 HPDETECT_ HPDETECT plug debounce status. Setting HPDETECT_INV reverses the meaning of this bit.
PLUG_DBC _{0 (Default) Condition is not present}
1 Condition is present
5 HPDETECT_ HPDETECT unplug debounce status. Setting HPDETECT_INV reverses the meaning of this bit.
UNPLUG_
DBC
0 (Default) Condition is not present
1 Condition is present
4:0
—
Reserved
7.5.10 HP Load 1
R/W
7
6
5
HPLOAD_EN
—
Default
0
0
0
4
HPLOAD_
CHN_SEL
0
3
2
—
0
0
Bits
Name
7 HPLOAD_EN HP load enable.
0 (Default) Function disabled
1 Function enabled
6:5
—
Reserved
4 HPLOAD_ Select channel to perform HP load measurement.
CHN_SEL _{0 (Default) HPOUTA}
1 HPOUTB
3:2
—
Reserved
Description
Address 0xE0000
1
0
HPLOAD_AC_ HPLOAD_DC_
START
START
0
0
112
DS1073F1