CS43130 Datasheet, PDF (101/137 Pages) Cirrus Logic – 130-dB, 32-Bit High-Performance DAC with Integrated Headphone Driver

CS43130
7.3 ASP and XSP Registers
7.3.5 ASP Denominator 2
Address 0x40013
R/W
7
6
5
4
3
2
1
0
ASP_M_MSB
Default
0
0
0
0
0
0
0
0
Bits
Name
Description
7:0 ASP_M_MSB The value in this register cannot be changed while the serial port is powered up.
ASP sample rate fractional divide denominator LSB. Along with ASP_N_MSB/LSB, selects the fractional divide value for
setting the SCLK frequency.
(Default) ASP_M = 8
7.3.6 ASP LRCK High Time 1
Address 0x40014
R/W
7
6
5
4
3
2
1
0
ASP_LCHI_LSB
Default
0
0
0
1
1
1
1
1
Bits
Name
Description
7:0 ASP_LCHI_ The value in this register cannot be changed while the serial port is powered up.
LSB
ASP LRCK high duration, in units of ASP_SCLK periods stored in ASP_LCHI_MSB/LSB. This value must be less than
ASP_LCPR.
(Default) ASP_LCHI = 31
7.3.7 ASP LRCK High Time 2
Address 0x40015
R/W
7
6
5
4
3
2
1
0
ASP_LCHI_MSB
Default
0
0
0
0
0
0
0
0
Bits
Name
Description
7:0 ASP_LCHI_ The value in this register cannot be changed while the serial port is powered up.
MSB
ASP LRCK high duration, in units of ASP_SCLK periods stored in ASP_LCHI_MSB/LSB. This value must be less than
ASP_LCPR.
(Default) ASP_LCHI = 31
7.3.8 ASP LRCK Period 1
R/W
7
6
5
4
3
2
ASP_LCPR_LSB
Default
0
0
1
1
1
1
Bits
Name
Description
7:0 ASP_LCPR_ The value in this register cannot be changed while the serial port is powered up.
LSB
ASP LRCK period, in units of ASP_SCLK periods stored in ASP_LCPR_MSB/LSB.
(Default) ASP_LCPR = 63
Address 0x40016
1
0
1
1
7.3.9 ASP LRCK Period 2
R/W
7
6
5
4
3
2
ASP_LCPR_MSB
Default
0
0
0
0
0
0
Bits
Name
Description
7:0 ASP_LCPR_ The value in this register cannot be changed while the serial port is powered up.
MSB
ASP LRCK period, in units of ASP_SCLK periods stored in ASP_LCPR_MSB/LSB.
(Default) ASP_LCPR = 63
Address 0x40017
1
0
0
0
DS1073F1
101