CS43130 Datasheet, PDF (8/137 Pages) Cirrus Logic – 130-dB, 32-Bit High-Performance DAC with Integrated Headphone Driver

CS43130
1.4 Electrostatic Discharge (ESD) Protection Circuitry
1.4 Electrostatic Discharge (ESD) Protection Circuitry
ESD-sensitive device. The CS43130 is manufactured on a CMOS process. Therefore, it is generically
susceptible to damage from excessive static voltages. Proper ESD precautions must be taken while
handling and storing this device. This device is qualified to current JEDEC ESD standards.
Fig. 1-3 provides a composite view of the ESD domains showing the ESD protection paths between each pad and the
substrate (GND), as well as the interrelations between some domains. Note that this figure represents the structure for the
internal protection devices and that additional protections can be implemented as part of the integration into the board.
VL
VD
VCP
VA
GNDD
*
GNDA
*
Substrate
VP/GNDCP Domain
VCP_FILT+/VCP_FILT– Domain
VP
VCP_FILT+
GNDCP
–VA
*
*
*
VP/VCP_FILT– Domain
VCP_FILT–
Figure 1-3. Composite ESD Topology
Table 1-2 shows the individual ESD domains and lists the pins associated with each domain.
Table 1-2. ESD Domains
ESD Domain
VL/GNDD
Signal Name
(See * in Topology Figures for Pad)
ADR
DSDCLK/SCLK2
SCL
SDA
DSDB/LRCK2
DSDA/SDIN2
SDIN1
LRCK1
SCLK1
CLKOUT
XTI/MCLK
XTO
Topology
VL
GNDD
*
Substrate
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DS1073F1