CS43130 Datasheet, PDF (16/137 Pages) Cirrus Logic – 130-dB, 32-Bit High-Performance DAC with Integrated Headphone Driver

CS43130
3 Characteristics and Specifications
Table 3-7. Alternate Headphone Path
Test conditions (unless specified otherwise): Fig. 2-1 shows CS43130 connections; GNDD = GNDCP = GNDA = 0 V; voltages are with respect to
ground; typical performance data taken with VP = 3.6 V, VCP = VA = 1.8 V, VL = VD = 1.8 V; min/max performance data taken with VP = 3.6 V,
VCP = 1.8 V, VA = 0 V, VL = VD = 1.8 V; R_L = 32 ; TA = +25°C; measurement bandwidth is 20 Hz–20 kHz; MCLK_SRC_SEL = 10, PDN_XTAL = 1.
Switch on characteristics
(PDN_HP = 1
HP_IN_EN = 1)
Parameters
Signal range when switch on ¹
THD+N with 32  @ 2.82 Vpp
Interchannel isolation
Switch off characteristics
(PDN_HP = 1,
HP_IN_EN = 0)
HPINx turn-on time ²
Analog signal range when switched off ^3,4
Turn-off time ⁵
Off isolation ⁶
217 Hz
1 kHz
20 kHz
217 Hz
1 kHz
20 kHz
Symbol
V_INAI
—
—
t_{HPIN_ON}
V_INOFF
t_{HPIN_OFF}
Minimum
—
—
104
—
—
—
—
—
—
—
—
Typical
—
–99
110
110
90
—
—
—
120
120
100
Maximum Units
3.00 Vpp
—
dB
—
dB
—
dB
—
dB
80
s
0.3
Vp
20
s
—
dB
—
dB
—
dB
1.When switch is on, maximally allowable voltage applied to HPINx pins.
2.HPINx turn-on time is measured when setting HP_IN_EN = 1 I²C ACK signal is received to when the signal appears on the HP out. MCLK_SRC_
SEL = 00, PDN_XTAL = 0, MCLK_INT = 1, and VCP_FILT± has been properly charged to expected nominal values.
3.When switch is off, maximally allowable voltage applied to HPINx pins.
4.Before switch off event, it is required HPINx signal is within this range before the switch is turned off. When the switch is in off state, HPINx signal
cannot exceed this specified range.
5.HPINx turn-off time is measured when HP_IN_EN = 0 ACK signal is received to when the signal disappears from the HP out. This spec also applies
when register settings are: MCLK_SRC_SEL = 00, PDN_XTAL = 0, MCLK_INT = 1.
6.Off isolation specification is measured with V_INOFF = 0.1 Vp input.
Table 3-8. Combined DAC Digital, On-Chip Analog and HPOUTx Filter Characteristics
Test conditions (unless specified otherwise): The filter characteristics have been normalized to the sample rate (Fs) and can be referenced to the desired
sample rate by multiplying the given characteristic by Fs. Single-Speed Mode refers to 32-, 44.1-, and 48-kHz sample rates. Double-Speed Mode refers
to 88.2- and 96-kHz sample rates. Quad-Speed Mode refers to 176.4- and 192-kHz sample rates. Octuple-Speed Mode refers to 352.8- and 384-kHz
sample rates. MCLK_INT is an integer multiple of Fs; HPF disabled; no DC offset applied; group delay does not include serial port delay.
Parameter
Minimum Typical Maximum Units
Fast Roll-Off
Passband ²
(FILTER_SLOW_FASTB = 0)
Single-Speed Mode ¹
to –0.01-dB corner 0
to –3-dB corner 0
attenuation @ Fs/2 8.44 ³
—
0.4535 ⁴ Fs
—
0.49
Fs
—
—
dB
Passband ripple 10 Hz to –0.01-dB corner ⁵
–0.01
—
+0.01 dB
Stopband
0.547
—
—
Fs
Stopband attenuation ⁶
PHCOMP_LOWLATB = 0 110 ⁷
—
PHCOMB_LOWLATB = 1 105
—
—
dB
—
dB
Group delay (linear phase)
PHCOMB_LOWLATB = 1 —
39.5/Fs ⁸
—
s
Group delay (minimum phase)
PHCOMB_LOWLATB = 0 —
6.3/Fs ⁹
—
s
Deemphasis error ¹⁰
(Relative to 1 kHz)
Fs = 44.1 kHz —
—
±0.14 dB
Fast Roll-Off
Passband ²
(FILTER_SLOW_FASTB = 0)
Double-Speed Mode ¹
to –0.01-dB corner 0
—
0.227 Fs
to –3-dB corner 0
—
0.48
Fs
attenuation @ Fs/2 7.77
—
—
dB
Passband ripple 10 Hz to –0.01-dB corner
–0.01
—
0.01 dB
Stopband
0.583
—
—
Fs
Stopband attenuation ⁶
80
—
—
dB
Group delay (linear phase)
PHCOMB_LOWLATB = 1 —
22.3/Fs
—
s
Group delay (minimum phase)
PHCOMB_LOWLATB = 0 —
7.5/Fs
—
s
Fast Roll-Off
Passband ²
(FILTER_SLOW_FASTB = 0)
Quad-Speed Mode ¹
to –0.01-dB corner 0
—
0.114 Fs
to –3-dB corner 0
—
0.46
Fs
attenuation @ Fs/2 9.44
—
—
dB
Passband ripple 10 Hz to –0.01-dB corner
–0.01
—
0.01 dB
Stopband
0.583
—
—
Fs
Stopband attenuation ⁶
80
—
—
dB
Group delay (linear phase)
PHCOMB_LOWLATB = 1 —
20.7/Fs
—
s
Group delay (minimum phase)
PHCOMB_LOWLATB = 0 —
11.3/Fs
—
s
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DS1073F1