CS43130 Datasheet, PDF (103/137 Pages) Cirrus Logic – 130-dB, 32-Bit High-Performance DAC with Integrated Headphone Driver

CS43130
7.3 ASP and XSP Registers
7.3.13 XSP Numerator 2
Address 0x40021
R/W
7
6
5
4
3
2
1
0
XSP_N_MSB
Default
0
0
0
0
0
0
0
0
Bits
Name
Description
7:0 XSP_N_MSB The value in this register cannot be changed while the serial port is powered up.
XSP sample rate fractional divide numerator MSB. Along with XSP_M_MSB/LSB, selects the fractional divide value for
setting the SCLK frequency.
(Default) XSP_N = 1
7.3.14 XSP Denominator 1
Address 0x40022
R/W
7
6
5
4
3
2
1
0
XSP_M_LSB
Default
0
0
0
0
0
0
1
0
Bits
Name
Description
7:0 XSP_M_LSB The value in this register cannot be changed while the serial port is powered up.
XSP sample rate fractional divide denominator LSB. Along with XSP_N_MSB/LSB, selects the fractional divide value for
setting the SCLK frequency.
(Default) XSP_M = 2
7.3.15 XSP Denominator 2
Address 0x40023
R/W
7
6
5
4
3
2
1
0
XSP_M_MSB
Default
0
0
0
0
0
0
0
0
Bits
Name
Description
7:0 XSP_M_MSB The value in this register cannot be changed while the serial port is powered up.
XSP sample rate fractional divide denominator MSB. Along with XSP_N_MSB/LSB, selects the fractional divide value
for setting the SCLK frequency.
(Default) XSP_M = 2
7.3.16 XSP LRCK High Time 1
Address 0x40024
R/W
7
6
5
4
3
2
1
0
XSP_LCHI_LSB
Default
0
0
0
1
1
1
1
1
Bits
Name
Description
7:0 XSP_LCHI_ The value in this register cannot be changed while the serial port is powered up.
LSB
XSP LRCK high duration, in units of XSP_SCLK periods stored in XSP_LCHI_LSB/MSB. This value must be less than
XSP_LCPR.
(Default) XSP_LCHI = 31
7.3.17 XSP LRCK High Time 2
Address 0x40025
R/W
7
6
5
4
3
2
1
0
XSP_LCHI_MSB
Default
0
0
0
0
0
0
0
0
Bits
Name
Description
7:0 XSP_LCHI_ The value in this register cannot be changed while the serial port is powered up.
MSB
XSP LRCK high duration, in units of XSP_SCLK periods stored in XSP_LCHI_LSB/MSB. This value must be less than
XSP_LCPR.
(Default) XSP_LCHI = 31
DS1073F1
103