CS43130 Datasheet, PDF (65/137 Pages) Cirrus Logic – 130-dB, 32-Bit High-Performance DAC with Integrated Headphone Driver

Example 5-11. Startup to I²S Playback (Cont.)
STEP
TASK
16 Configure ASP clock
REGISTER/BIT FIELDS
ASP Clock Configuration. 0x40018
Reserved
ASP_M/SB
ASP_SCPOL_OUT
ASP_SCPOL_IN
ASP_LCPOL_OUT
ASP_LCPOL_IN
17 Configure ASP frame
ASP Frame Configuration. 0x40019
Reserved
ASP_STP
ASP_5050
ASP_FSD
18 Set ASP channel location ASP Channel 1 Location. 0x50000
ASP_RX_CH1
ASP Channel 2 Location. 0x50001
ASP_RX_CH2
19 Set ASP channel size and ASP Channel 1 Size and Enable. 0x5000A
enable
Reserved
ASP_RX_CH1_AP
ASP_RX_CH1_EN
ASP_RX_CH1_RES
ASP Channel 2 Size and Enable. 0x5000B
Reserved
ASP_RX_CH2_AP
ASP_RX_CH2_EN
ASP_RX_CH2_RES
20 Configure PCM interface. HPF filter is used. Deemphasis off.
21 Configure PCM filter
PCM Filter Option. 0x90000
FILTER_SLOW_FASTB
PHCOMP_LOWLATB
NOS
Reserved
HIGH_PASS
DEEMP_ON
22 Set volume for channel B PCM Volume B. 0x90001
PCM_VOLUME_B
23 Set volume for channel A PCM Volume A. 0x90002
PCM_VOLUME_A
24 Configure PCM path signal PCM Path Signal Control 1. 0x90003
control
PCM_RAMP_DOWN
PCM_VOL_BEQA
PCM_SZC
PCM_AMUTE
PCM_AMUTEBEQA
PCM_MUTE_A
PCM_MUTE_B
PCM Path Signal Control 2. 0x90004
Reserved
PCM_INV_A
PCM_INV_B
PCM_SWAP_CHAN
PCM_COPY_CHAN
25 Configure HP
26 Configure Class H
amplifier
Class H Control. 0xB0000
Reserved
ADPT_PWR
HV_EN
EXT_VCPFILT
27 Set HP output to full scale HP Output Control 1. 0x80000
HP_CLAMPA
HP_CLAMPB
OUT_FS
HP_IN_EN
Reserved
CS43130
5.10 Example Sequences
VALUE
0x1C
000
1
1
1
0
0
0x0A
000
0
1
010
0x00
0x00
0x00
0x00
0x07
0000
0
1
11
0x0F
0000
1
1
11
DESCRIPTION
Set ASP port to be master
Configure clock polarity for I²S input
Configure ASP port to accept I²S input
ASP Channel 1 starts on SCLK0
ASP Channel 2 starts on SCLK0
ASP Channel 1 Active Phase
ASP Channel 1 Enable
ASP Channel 1 Size is 32 bits
ASP Channel 2 Active Phase
ASP Channel 2 Enable
ASP Channel 2 Size is 32 bits
0x02
0
0
0
0 00
1
0
0x00
0x00
0x00
0x00
0xEC
1
1
10
1
1
0
0
0x00
0000
0
0
0
0
High pass filter is selected
Set volume to 0 dB
Set volume to 0 dB
Soft ramp down of volume on filter change
Volume setting on both channels controlled by PCM_
VOLUME_A
Enable soft ramp
Mute after reception of 8192 samples of 0 or –1.
Mute only when AMUTE condition is detected on both
channels
Function is disabled
Function is disabled
Disable all functions in this register
0x1E
000
1 11
1
0
0x30
0
0
11
0
000
Output signal determines voltage level
High voltage mode enabled
Using internal VCPFILT source.
Set headphone output to full scale (1.732 V rms)
DS1073F1
65