CS43130 Datasheet, PDF (10/137 Pages) Cirrus Logic – 130-dB, 32-Bit High-Performance DAC with Integrated Headphone Driver

2 Typical Connection Diagram
+1.8V
0.1 µF *
0.1 µF
*
Audio
Devices
VL
VD
CLKOUT
See Clocking
Configuration
XTI / MCLK
XTO
DoP/DSD
Digital Audio
Source
PCM/DoP
Digital Audio
Source
Audio Codec
Headphone
Output
DSDCLK/SCLK2
DSDB/LRCLK2
DSDA/SDIN2
SDIN1
LRCK1 ^CS43130
SCLK1
HPINB
HPINA
CS43130
2 Typical Connection Diagram
VP
FILT +
VA
-VA
FILT-
FLYP_VA
FLYN_VA
15 µF
*
0.1 µF
*
+1.8V
2.2 µF 2.2 µF
*15 µF *
*
2.2 µF
*
Battery
(3.0V-5.25V)
4.7 µF
*
VCP
VCP_FILT+
VC P_FILT –
GNDCP
FLYP _VCP
FLYC_VCP
FLYN _VCP
See
VCP_FILT
Co₂n_.2fig_µFuration
*_{2.2 µF}
*
Applications
Processor/
Micro-
Controller
1 R P_I
VL
ADR
SDA
SCL
RESET
INT
GNDD
HPOUTB
HPOUTA
HP_DETECT
HPREFA
GNDA ^HPREFB
Headphone
Connector
1
2
3
Clocking Configuration
External MCLK
XTAL
System
Clock
XTI/MCLK
XTO
XTI/MCLK
**
XTO
**
All external passive component
values shown are nomina.l
Key for Capacitor Types Required:
* Use low ESR, X7R/X5R capacitors
If no type symbol is shown next to a
capacitor, any type may be used.
** Use C0G capacitors.
EXT_VCPFILT = 0
VCP_FILT Configuration
EXT_VCPFILT = 1
VCP
VC P_FILT +
VCP_FILT–
GNDCP
FLYP _VCP
FLYC_VCP
FLYN _VCP
+1.8V
2.2 µF
*
2.2 µF
2.2 µF ^*
*
2.2 µF
*_{2.2 µF}
*
VCP
VC P_FILT +
VCP_FILT–
GNDCP
FLYP _VCP
FLYC_VCP
FLYN _VCP
+1.8V
+3.0V
-3.0V
* 2.2 µF
* _{2.2 µF} * 2.2 µF
2.2 µF
*
NC
Figure 2-1. Typical Connection Diagram
Note:
1. The value for R_{P_I} can be determined by the interrupt pin specification in Table 3-11.
10
DS1073F1