EP2SGX30CF780C5N Datasheet, PDF (61/316 Pages) Altera Corporation – Section I. Stratix II GX Device Data Sheet

Stratix II GX Architecture
To pack two five-input functions into one ALM, the functions must have
at least two common inputs. The common inputs are dataa and datab.
The combination of a four-input function with a five-input function
requires one common input (either dataa or datab).
To implement two six-input functions in one ALM, four inputs must be
shared and the combinational function must be the same. For example, a
4 × 2 crossbar switch (two 4-to-1 multiplexers with common inputs and
unique select lines) can be implemented in one ALM, as shown in
Figure 2–38. The shared inputs are dataa, datab, datac, and datad,
while the unique select lines are datae0 and dataf0 for function0,
and datae1 and dataf1 for function1. This crossbar switch
consumes four LUTs in a four-input LUT-based architecture.
Figure 2–38. 4 × 2 Crossbar Switch Example
sel0[1..0]
inputa
inputb
inputc
inputd
4 × 2 Crossbar Switch
out0
out1
dataf0
datae0
dataa
datab
datac
datad
Implementation in 1 ALM
Six-Input
LUT
(Function0)
sel1[1..0]
datae1
dataf1
Six-Input
LUT
(Function1)
combout0
combout1
Altera Corporation
October 2007
In a sparsely used device, functions that could be placed into one ALM
can be implemented in separate ALMs. The Quartus II Compiler spreads
a design out to achieve the best possible performance. As a device begins
to fill up, the Quartus II software automatically utilizes the full potential
of the Stratix II GX ALM. The Quartus II Compiler automatically searches
for functions of common inputs or completely independent functions to
be placed into one ALM and to make efficient use of the device resources.
In addition, you can manually control resource usage by setting location
assignments. Any six-input function can be implemented utilizing inputs
dataa, datab, datac, datad, and either datae0 and dataf0 or
datae1 and dataf1. If datae0 and dataf0 are utilized, the output is
driven to register0, and/or register0 is bypassed and the data
drives out to the interconnect using the top set of output drivers (see
Figure 2–39). If datae1 and dataf1 are utilized, the output drives to
register1 and/or bypasses register1 and drives to the interconnect
2–53
Stratix II GX Device Handbook, Volume 1