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EP2SGX30CF780C5N Datasheet, PDF (112/316 Pages) Altera Corporation – Section I. Stratix II GX Device Data Sheet | |||
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PLLs and Clock Networks
Table 2â27. Global and Regional Clock Connections from Left Side Clock Pins and Fast PLL Outputs
(Part 3 of 3)
Left Side Global and Regional
Clock Network Connectivity
PLL 8 outputs
c0
c1
c2
c3
vv
vv
vv
vv
v
v
v
v
v
v
v
v
2â104
Stratix II GX Device Handbook, Volume 1
Altera Corporation
October 2007
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