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EP2SGX30CF780C5N Datasheet, PDF (222/316 Pages) Altera Corporation – Section I. Stratix II GX Device Data Sheet
Operating Conditions
Table 4–39. SSTL-2 Class II Specifications
Symbol
Parameter
Conditions
Minimum
VIH (DC)
VIL (DC)
VIH (AC)
VIL (AC)
VOH
VOL
High-level DC input voltage
Low-level DC input voltage
High-level AC input voltage
Low-level AC input voltage
High-level output voltage
Low-level output voltage
VREF + 0.18
–0.3
VREF + 0.35
IOH = –16.4 mA (1) VTT + 0.76
IOL = 16.4 mA (1)
Typical
Maximum Unit
VCCIO + 0.3 V
VREF – 0.18 V
V
VREF – 0.35 V
V
VTT – 0.76 V
Note to Table 4–39:
(1) This specification is supported across all the programmable drive settings available for this I/O standard as shown
in the Stratix II GX Architecture chapter in volume 1 of the Stratix II GX Device Handbook.
Table 4–40. SSTL-2 Class I and II Differential Specifications
Symbol
Parameter
VCCIO
Output supply voltage
VSWING (DC) DC differential input voltage
VX (AC)
AC differential input cross
point voltage
VSWING (AC) AC differential input voltage
VISO
Input clock signal offset
voltage
ΔVISO
Input clock signal offset
voltage variation
VOX (AC)
AC differential output cross
point voltage
Conditions Minimum
2.375
0.36
(VCCIO/2) – 0.2
0.7
(VCCIO/2) – 0.2
Typical
2.5
0.5 VCCIO
200
Maximum Unit
2.625
V
V
(VCCIO/2) + 0.2 V
V
V
mV
(VCCIO/2) + 0.2 V
Table 4–41. 1.2-V HSTL Specifications
Symbol
Parameter
Conditions
VCCIO Output supply voltage
VREF Reference voltage
VIH (DC) High-level DC input voltage
VIL (DC) Low-level DC input voltage
VIH (AC) High-level AC input voltage
VIL (AC) Low-level AC input voltage
Minimum
1.14
0.48 VCCIO
VREF + 0.08
–0.15
VREF + 0.15
–0.24
Typical
1.2
0.5 VCCIO
Maximum
1.26
0.52 VCCIO
VCCIO + 0.15
VREF – 0.08
VCCIO + 0.24
VREF – 0.15
Unit
V
V
V
V
V
V
4–52
Stratix II GX Device Handbook, Volume 1
Altera Corporation
June 2009