EP2SGX30CF780C5N Datasheet, PDF (191/316 Pages) Altera Corporation – Section I. Stratix II GX Device Data Sheet

DC and Switching Characteristics
Table 4–19. Stratix II GX Transceiver Block AC Specification Notes (1), (2), (3) (Part 4 of 19)
Symbol/
Description
Conditions
-3 Speed
Commercial Speed
Grade
-4 Speed
Commercial and
Industrial Speed
Grade
-5 Speed
Commercial Speed
Grade
Unit
Min Typ Max Min Typ Max Min Typ Max
Sinusoidal jitter
FC-1
Fc/25000
Fc/1667
Deterministic jitter Pattern = CJTPAT
FC-2
No Equalization
DC Gain = 0 dB
Random jitter FC- Pattern = CJTPAT
2
No Equalization
DC Gain = 0 dB
Sinusoidal jitter
FC-2
Fc/25000
Fc/1667
Deterministic jitter Pattern = CJTPAT
FC-4
No Equalization
DC Gain = 0 dB
Random jitter FC- Pattern = CJTPAT
4
No Equalization
DC Gain = 0 dB
Sinusoidal jitter
FC-4
Fc/25000
Fc/1667
XAUI Transmit Jitter Generation (9)
> 1.5
> 0.1
> 0.33
> 0.29
> 1.5
> 0.1
> 0.33
> 0.29
> 1.5
> 0.1
> 1.5
> 0.1
> 0.33
> 0.29
> 1.5
> 0.1
> 0.33
> 0.29
> 1.5
> 0.1
> 1.5
UI
> 0.1
UI
> 0.33
UI
> 0.29
UI
> 1.5
UI
> 0.1
UI
> 0.33
UI
> 0.29
UI
> 1.5
UI
> 0.1
UI
Total jitter at
3.125 Gbps
REFCLK =
156.25 MHz
Pattern = CJPAT
V_OD = 1200 mV
No Pre-emphasis
Deterministic jitter
at 3.125 Gbps
REFCLK =
156.25 MHz
Pattern = CJPAT
V_OD = 1200 mV
No Pre-emphasis
XAUI Receiver Jitter Tolerance (9)
Total jitter
Pattern = CJPAT
No Equalization
DC Gain = 3 dB
Deterministic jitter Pattern = CJPAT
No Equalization
DC Gain = 3 dB
-
- 0.3 -
- 0.3 -
-
0.3
UI
-
- 0.17 -
- 0.17 -
- 0.17 UI
> 0.65
> 0.37
> 0.65
> 0.37
> 0.65
UI
> 0.37
UI
Altera Corporation
June 2009
4–21
Stratix II GX Device Handbook, Volume 1