Z16C32 Datasheet, PDF (87/121 Pages) Zilog, Inc. – IUSC™ INTEGRATED UNIVERSAL SERIAL CONTROLLER

ZILOG
PRELIMINARY
Z16C32 IUSC^™
Address: None _*
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
* Refer to Figure 22 (Channel Control Register)
Bits 6-7 for Access Method
RCC <0>
Rx Overrun
Parity Error Rx/Frame Abort
CRC Error
Rx Bound
0
0
0
Short Frame/CV Polarity
Residue Code 0
Residue Code 1
Residue Code 2
0
0
First Byte in Error
Second Byte in Error
Figure 78. Receive Status Block Register (RSBR)
PS97USC0200
87