Z16C32 Datasheet, PDF (50/121 Pages) Zilog, Inc. – IUSC™ INTEGRATED UNIVERSAL SERIAL CONTROLLER

ZILOG
PRELIMINARY
CONTROL REGISTERS (Continued)
Address: 00001
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Z16C32 IUSC^™
0 0 1 0 Isochronous ^Receiver
Mode
Reserved
0
0
1
0
Isochronous
Transmitter
Mode
Reserved
Tx Two Stop Bits
Reserved
Figure 38. Channel Mode Register, Isochronous Mode
Address: 00001
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0 0 1 1 Asynchronous with CV ^Receiver
Mode
Rx Extended Word
Reserved
0 0 1 1 Asynchronous with CV
Transmitter
Mode
CV Polarity
Tx Extended Word
0 0 One Stop Bit
0 1 Two Stop Bits
1 0 No Stop Bit
1 1 Reserved
Tx
Stop Bits
Figure 39. Channel Mode Register, Asynchronous Mode
with Code Violation (MIL STD 1553)
50
PS97USC0200