Z16C32 Datasheet, PDF (23/121 Pages) Zilog, Inc. – IUSC™ INTEGRATED UNIVERSAL SERIAL CONTROLLER

ZILOG
PRELIMINARY
Z16C32 IUSC^™
D7 D6 D5 D4 D3 D2 D1 D0
Software Abort (RO)
Hardware Abort (RO)
Buffer Termination (RO)
Array Termination (RO)
Busy (RO)
Initializing (RO)
Get Link (RO)
Continue (RO)
0 0 0 0 0 0 0 0 Reset
X X X 1 X X X X Start
1 X X 1 X X X X Start/Continue (Buffered Mode)
X X X 1 X X X X Start/Continue (Other Than Buffered Mode)
X X X 0 X X X X Pause
X X X 0 X X X 1 Abort
X X 1 1 X X X X Start/Init (Array or Linked Array Modes)
X X X 1 X X X X Start/Init (Normal or Buffered Modes)
Notes:
X = Previous Value
(RO) = Read Only
Command
Figure 8. Affect of Commands on Status Bits
PS97USC0200
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