Z16C32 Datasheet, PDF(54/121 Page) Zilog, Inc. – IUSC™ INTEGRATED UNIVERSAL SERIAL CONTROLLER

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Z16C32 Datasheet, PDF (54/121 Pages) Zilog, Inc. – IUSC™ INTEGRATED UNIVERSAL SERIAL CONTROLLER

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ZILOG

PRELIMINARY

CONTROL REGISTERS (Continued)

Address: 00001

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Z16C32 IUSCâ¢

1 1 0 0 Reserved

Receiver

Mode

Reserved

11

00

Slaved Monosync

Transmitter

Mode

Tx Short Sync Character

Tx Active on Received Sync

Reserved

Tx CRC on Underrun

Figure 46. Channel Mode Register, Slaved Monosync Mode

Address: 00001

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

1

1

1

0

Reserved

Receiver

Mode

Reserved

1 1 1 0 HDLC Loop

Transmitter

Mode

Shared-Zero Flags

Tx Active on Poll

0 0 Abort

0 1 Extended Abort

1 0 Flag

1 1 CRC/Flag

Tx Underrun

Condition

Figure 47. Channel Mode Register, HDLC Loop Mode

54

PS97USC0200

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