Z16C32 Datasheet, PDF (72/121 Pages) Zilog, Inc. – IUSC™ INTEGRATED UNIVERSAL SERIAL CONTROLLER

ZILOG
PRELIMINARY
CONTROL REGISTERS (Continued)
Address: 10011
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Z16C32 IUSC^™
TC0R Read Count/TC
Rx Overrun IA
Parity Error/Frame Abort IA
Status on Words
Rx CV/EOT/EOF IA
Rx Break/Abort IA
Rx Idle IA
Exited Hunt IA
Rx FIFO Control and Status
(Fill/Interrupt/DMA Level)
Figure 65a. Receive Interrupt Control Register (RICR)
Address: 10011
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
TC0R Read Count/TC
Rx Overrun IA
Parity Error/Frame Abort IA
Status on Words
Rx CV/EOT/EOF IA
Rx Break/Abort IA
Rx Idle IA
Exited Hunt IA
0
Timeslot (0-127)
Figure 65b. Receive Interrupt Control Register (RICR)
72
PS97USC0200