Z16C32 Datasheet, PDF (49/121 Pages) Zilog, Inc. – IUSC™ INTEGRATED UNIVERSAL SERIAL CONTROLLER

ZILOG
PRELIMINARY
Address: 00001
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Z16C32 IUSC^™
0 0 0 0 Asynchronous
Receiver
Mode
0 0 16X Data Rate
0 1 32X Data Rate
1 0 64X Data Rate
1 1 Reserved
Rx Clock
Rate
Reserved
Reserved
0 0 0 0 Asynchronous
Transmitter
Mode
0 0 16X Data Rate
0 1 32X Data Rate
1 0 64X Data Rate
1 1 Reserved
Tx Clock
Rate
0 0 One Stop Bit
0 1 Two Stop Bits
1 0 One Stop Bit, Shaved
1 1 Two Stop Bits, Shaved
Tx Stop
Bits
Figure 36. Channel Mode Register, Asynchronous Mode
Address: 00001
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0 0 0 1 External Sync
Receiver
Mode
Reserved
0 0 0 1 Reserved
Transmitter
Mode
Reserved
Figure 37. Channel Mode Register, External Sync Mode
PS97USC0200
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