Z16C32 Datasheet, PDF (64/121 Pages) Zilog, Inc. – IUSC™ INTEGRATED UNIVERSAL SERIAL CONTROLLER

ZILOG
PRELIMINARY
CONTROL REGISTERS (Continued)
Address: 01011
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Z16C32 IUSC^™
0 0 0 Input Pin
0 0 1 Rx Clock Output
0 1 0 Rx Byte Clock Output
0 1 1 SYNC Output
1 0 0 BRG0 Output
1 0 1 BRG1 Output
1 1 0 CTR0 Output
1 1 1 DPLL Rx Output
/RxC Pin
Control
0 0 0 Input PIn
0 0 1 Tx Clock Output
0 1 0 Tx Byte Clock Output
0 1 1 Tx Complete Output
1 0 0 BRG0 Output
1 0 1 BRG1 Output
1 1 0 CTR1 Output
1 1 1 DPLL Tx Output
/TxC
Pin Control
0 0 Tx Data Output
0 1 3-State Output
1 0 Output 0
1 1 Output 1
TxD Pin
Control
0 0 3-State Output
0 1 Rx Request Output
1 0 Output 0
1 1 Output 1
/RxREQ
Pin Control
0 0 3-State Output
0 1 Tx Request Output
1 0 Output 0
1 1 Output 1
/TxREQ
Pin Control
0 0 /DCD Input
0 1 /DCD//SYNC Input
1 0 Output 0
1 1 Output 1
/DCD
Pin Control
0 0 /CTS Input
0 1 /CTS Input
1 0 Output 0
1 1 Output 1
/CTS
Pin Control
Figure 57. I/O Control Register (IOCR)
64
PS97USC0200