Z16C32 Datasheet, PDF (3/121 Pages) Zilog, Inc. – IUSC™ INTEGRATED UNIVERSAL SERIAL CONTROLLER

ZILOG
Host
Processor
PRELIMINARY
Bus
Interface
16-Bit Internal Data Bus
Transmit
DMA
Interrupt
Control
Z16C32 IUSC^™
Receive
DMA
Transmit
FIFO
Time Slot
Assigner
Transmitter
Serial Clock
Logic
DPLL
Counters
BRG0, BRG1
Receive
FIFO
Receiver
I/O
Time Slot
Assigner
Port
Figure 1. Z16C32 IUSC Block Diagram
PS97USC0200
3