HD6473258CP10 Datasheet, PDF (92/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

Mode 1: In mode 1 (expanded mode without on-chip ROM), port 2 is automatically used for
address output. The port 2 data direction register is unwritable. All bits in P2DDR are automatically
set to 1 and cannot be cleared to 0.
Mode 2: In mode 2 (expanded mode with on-chip ROM), the usage of port 2 can be selected on a
pin-by-pin basis. A pin is used for general-purpose input if its data direction bit is cleared to 0, or
for address output if its data direction bit is set to 1.
Mode 3: In single-chip mode port 2 is a general-purpose input/output port.
Reset: A reset clears P2DDR and P2DR to all 0, placing all pins in the input state with the MOS
pull-ups off. In mode 1, when the chip comes out of reset P2DDR is set to all 1, making all pins
address output pins.
Hardware Standby Mode: All pins are placed in the high-impedance state with the MOS pull-ups
off.
Software Standby Mode: P2DDR and P2DR remain in their previous state. Address output pins
are low. General-purpose output pins continue to output the data in P2DR. The MOS pull-ups of
input pins are on or off depending on the values in P2DR.
Figure 5-2 shows a schematic diagram of port 2.
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