HD6473258CP10 Datasheet, PDF (196/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

Transmission direction
Serial clock
Data
Bit 0
Bit 1
Don’t-care
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Don’t-care
Figure 9-4. Data Format in Synchronous Mode
(2) Clock: Either the internal serial clock created by the on-chip baud rate generator or an external
clock input at the SCK pin can be selected in the synchronous mode. See table 9-6 for details.
(3) Data Transmission and Reception
• SCI Initialization: Before data can be transmitted or received_F,_igth₉e_-4SCI must be initialized by
software. To initialize the SCI, software must clear the TE and RE bits to 0 to disable both the
transmit and receive functions, then execute the following procedure.
ΠWrite the value corresponding to the desired bit rate in the BRR. (This step is not necessary if
an external clock is used.)
 Select the clock and enable desired interrupts in the SCR. Leave bit 0 (CKE0) cleared to 0.
Ž Select synchronous mode in the SMR.
 Set the TE and/or RE bit in the SCR to 1.
The TE and RE bits must both be cleared to 0 whenever the operating mode or data format is
changed. After changing the operating mode or data format, before setting the TE and RE bits to 1
software must wait for at least 1 bit transfer time at the selected communication speed, to make sure
the SCI is initialized.
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