HD6473258CP10 Datasheet, PDF (229/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

(b) In expanded mode with on-chip ROM enabled (mode 2): when software standby mode is
entered by executing an instruction stored in on-chip ROM, after even one instruction not
stored in on-chip ROM has been fetched (e.g. from external memory or on-chip RAM).
Note that the H8/300 CPU pre-fetches instructions. If an instruction stored in the last two bytes
of on-chip ROM is executed, the contents of the next two bytes, not in on-chip ROM, will be
fetched as the next instruction.
This problem does not occur in expanded mode when on-chip ROM is disabled (mode 1).
In hardware standby mode there is no additional current dissipation, regardless of the conditions
when hardware standby mode is entered.
12.5 Hardware Standby Mode
12.5.1 Transition to Hardware Standby Mode
Regardless of its current state, the chip enters the hardware standby mode whenever the STBY pin
goes low.
The hardware standby mode reduces power consumption drastically by halting the CPU, stopping
all the functions of the on-chip supporting modules, and placing I/O ports in the high-impedance
state. The registers of the on-chip supporting modules are reset to their initial values. Only the on-
chip RAM is held unchanged, provided the minimum necessary voltage supply is maintained (at
least 2V).
Notes: 1. The RAME bit in the system control register should be cleared to 0 before the STBY pin
goes low, to disable the on-chip RAM during the hardware standby mode.
2. Do not change the inputs at the mode pins (MD1, MD0) during hardware standby mode.
Be particularly careful not to let both mode pins go low in hardware standby mode, since
that places the chip in PROM mode and increases current drain.
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