HD6473258CP10 Datasheet, PDF (246/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

Table 15-7. Control Signal Timing
Condition A: VCC = 5.0V ±10%, Ø = 0.5 to 10MHz, VSS = 0V,
Ta = –20 to 75˚C (regular specifications), Ta = –40 to 85˚C (wide-range specifications)
Condition B: VCC = 2.7 to 3.6V, VSS = 0V, Ta = –20 to 75˚C, for only H8/3257 and H8/3256
Condition B
Condition A
5MHz
6MHz
8MHz
10MHz
Measurement
Item
Symbol min max min max min max min max Unit conditions
RES setup time
tRESS 300 –
200 –
200 –
200 –
ns Fig. 15-7
RES pulse width
tRESW 10 –
10 –
10 –
10 –
tcyc Fig. 15-7
Mode programming
tMDS
4
–
4
–
4
–
4
–
tcyc Fig. 15-7
setup time
NMI setup time
tNMIS 300 –
150 –
150 –
150 –
ns Fig. 15-8
(NMI, IRQ0 to IRQ2)
NMI hold time
tNMIH 10 –
10 –
10 –
10 –
ns Fig. 15-8
(NMI, IRQ0 to IRQ2)
Interrupt pulse width
tNMIW 300 –
200 –
200 –
200 –
ns Fig. 15-8
for recovery from soft-
ware standby mode
(NMI, IRQ0 to IRQ2)
Crystal oscillator settling tOSC1 20 –
20 –
20 –
20 –
ms Fig. 15-9
time (reset)
Crystal oscillator settling tOSC2 10 –
10 –
10 –
10 –
ms Fig. 15-10
time (software standby)
Table 15-8. Timing Conditions of On-Chip Supporting Modules
Condition A: VCC = 5.0V ±10%, Ø = 0.5 to 10MHz, VSS = 0V,
Ta = –20 to 75˚C (regular specifications), Ta = –40 to 85˚C (wide-range specifications)
Condition B: VCC = 2.7 to 3.6V, VSS = 0V, Ta = –20 to 75˚C, for only H8/3257 and H8/3256
Item
FRT
Condition B
Condition A
5MHz
6MHz
8MHz
10MHz
Measurement
Symbol min max min max min max min max Unit conditions
Timer output tFTOD –
150 –
100 –
100 –
100 ns Fig. 15-11
delay time
Timer input
tFTIS
80 –
50 –
50 –
50 –
ns Fig. 15-11
setup time
Timer clock
tFTCS 80 –
50 – 50 – 50 –
ns Fig. 15-12
input setup time
Timer clock
tFTCWH 1.5 –
1.5 – 1.5 – 1.5 –
tcyc Fig. 15-12
pulse width
tFTCWL
243