HD6473258CP10 Datasheet, PDF (142/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

These registers are written and read as follows:
• Register Write
When the CPU writes to the upper byte, the byte of write data is placed in TEMP. Next, when the
CPU writes to the lower byte, this byte of data is combined with the byte in TEMP and all 16 bits
are written in the register simultaneously.
• Register Read
When the CPU reads the upper byte, the upper byte of data is sent to the CPU and the lower byte
is placed in TEMP. When the CPU reads the lower byte, it receives the value in TEMP.
(As an exception, when the CPU reads OCRA or OCRB, it reads both the upper and lower bytes
directly, without using TEMP.)
Programs that access these registers should normally use word access. Equivalently, they may
access first the upper byte, then the lower byte by two consecutive byte accesses. Data will not be
transferred correctly if the bytes are accessed in reverse order, if only one byte is accessed, or if the
upper and lower bytes are accessed separately and another register is accessed in between, altering
the value in TEMP.
Coding Examples
To write the contents of general register R0 to OCRA:
To transfer the ICR contents to general register R0:
MOV.W R0, @OCRA
MOV.W @ICR, R0
Figure 7-3 shows the data flow when the FRC is accessed. The other registers are accessed in the
same way.
134