HD6473258CP10 Datasheet, PDF (233/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

Last state T1 T2 TE TE TE TE TE TE T3
Ø
E
A15 to A0, IOS
AS
RD (Read access)
WR (Write access)
D7 to D0
(Read access)
D7 to D0
(Write access)
Fig 13-2
Figure 13-2. Execution Cycle of Instruction Synchronized with E Clock in Expanded
Modes (Minimum Synchronization Delay)
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