HD6473258CP10 Datasheet, PDF (66/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

Ø
Internal address bus
Internal Read signal
Internal data bus (read)
Internal Write signal
Internal data bus (write)
Bus cycle
T1 state
T2 state
Address
Read data
Write data
Figure 3-13. On-Chip Memory Access Cycle
Ø
Address bus
AS: High
RD: High
WR: High
Data bus: high impedance state
Bus cycle
T1 state
T2 state
Fig. 3-13
Address
Figure 3-14. Pin States during On-Chip Memory Access Cycle
Fig. 3-14
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