HD6473258CP10 Datasheet, PDF (45/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

3.5 Instruction Set
Table 3-1 lists the H8/325 Series instruction set.
Table 3-1. Instruction Classification
Function
Data transfer
Arithmetic operations
Logic operations
Shift
Bit manipulation
Branch
System control
Block data transfer
Instructions
Types
MOV, MOVTPE, MOVFPE, PUSH^*1, POP^*1
3
ADD, SUB, ADDX, SUBX, INC, DEC, ADDS, SUBS, 14
DAA, DAS, MULXU, DIVXU, CMP, NEG
AND, OR, XOR, NOT
4
SHAL, SHAR, SHLL, SHLR, ROTL, ROTR, ROTXL, 8
ROTXR
BSET, BCLR, BNOT, BTST, BAND, BIAND, BOR,
14
BIOR, BXOR, BIXOR, BLD, BILD, BST, BIST
Bcc^*2, JMP, BSR, JSR, RTS
5
RTE, SLEEP, LDC, STC, ANDC, ORC, XORC, NOP 8
EEPMOV
1
Total 57
*1 _{PUSH Rn is equivalent to MOV.W Rn, @–SP.}
POP Rn is equivalent to MOV.W @SP+, Rn.
*2 _{Bcc is a conditional branch instruction in which cc represents a condition code.}
The following sections give a concise summary of the instructions in each category, and indicate
the bit patterns of their object code. The notation used is defined next.
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