HD6473258CP10 Datasheet, PDF (177/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

9.1.2 Block Diagram
Module data bus
Internal
data bus
RDR
TDR
RxD
RSR
TSR
TxD
Parity
generate
Parity check
SCK
RSR:
RDR:
TSR:
TDR:
SMR:
SCR:
SSR:
BRR:
Receive Shift Register
Receive Data Register
Transmit Shift Register
Transmit Data Register
Serial Mode Register
Serial Control Register
Serial Status Register
Bit Rate Register
SSR
SCR
SMR
Communi-
cation
control
BRR
Baud rate
generator
Clock
Ø Internal
Ø/4 clock
Ø/16 sources
Ø/64
External clock source
TXI
RXI
ERI
Interrupt signals
Figure 9-1. Block Diagram of Serial Communication Interface
9.1.3 Input and Output Pins
Figure 9-1
Table 9-1 lists the input and output pins used by the SCI module.
Table 9-1. SCI Input/Output Pins
Name
Serial clock
Serial receive data
Serial transmit data
Abbreviation
Channel 0 Channel 1
SCK0
SCK1
RxD0
RxD1
TxD0
TxD1
I/O
Input/output
Input
Output
Function
Serial clock input and output.
Receive data input.
Transmit data output.
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