HD6473258CP10 Datasheet, PDF (52/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

3.5.5 Bit Manipulations
Table 3-6 describes the bit-manipulation instructions. Figure 3-7 shows their object code formats.
Table 3-6. Bit-Manipulation Instructions (1)
Instruction
BSET
BCLR
BNOT
BTST
BAND
BIAND
BOR
BIOR
BXOR
Size*
B
B
B
B
B
B
B
Function
1 → (<bit-No.> of <EAd>)
Sets a specified bit in a general register or memory to “1.” The bit is
specified by a bit number, given in 3-bit immediate data or the lower
three bits of a general register.
0 → (<bit-No.> of <EAd>)
Clears a specified bit in a general register or memory to “0.” The bit is
specified by a bit number, given in 3-bit immediate data or the lower
three bits of a general register.
¬ (<bit-No.> of <EAd>) → (<bit-No.> of <EAd>)
Inverts a specified bit in a general register or memory. The bit is
specified by a bit number, given in 3-bit immediate data or the lower
three bits of a general register
¬ (<bit-No.> of <EAd>) → Z
Tests a specified bit in a general register or memory and sets or clears
the Z flag accordingly. The bit is specified by a bit number, given in
3-bit immediate data or the lower three bits of a general register.
C ∧ (<bit-No.> of <EAd>) → C
ANDs the C flag with a specified bit in a general register or memory.
C ∧ [¬ (<bit-No.> of <EAd>)] → C
ANDs the C flag with the inverse of a specified bit in a general register
or memory.
The bit number is specified by 3-bit immediate data.
C ∨ (<bit-No.> of <EAd>) → C
ORs the C flag with a specified bit in a general register or memory.
C ∨ [¬ (<bit-No.> of <EAd>)] → C
ORs the C flag with the inverse of a specified bit in a general register or
memory.
The bit number is specified by 3-bit immediate data.
C ⊕ (<bit-No.> of <EAd>) → C
XORs the C flag with a specified bit in a general register or memory.
* Size: operand size
B: Byte
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