HD6473258CP10 Datasheet, PDF (174/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

The pulse that increments the timer counter is generated at the falling edge of the internal clock
source signal. If clock sources are changed when the old source is high and the new source is low,
as in case No. 3 in table 8-5, the changeover generates a falling edge that triggers the TCNT clock
pulse and increments the timer counter.
Switching between an internal and external clock source can also cause the timer counter to
increment. This type of switching should be avoided at external clock edges.
Table 8-5. Effect of Changing Internal Clock Sources
No. Description
Low → Low*¹:
CKS1 and CKS0 are
1
rewritten while both
clock sources are low.
Old clock
source
New clock
source
TCNT clock
pulse
Timing chart
TCNT
N
N+1
CKS rewrite
Low → High*²:
CKS1 and CKS0 are
Old clock
source
2
rewritten while old
clock source is low and
New clock
source
new clock source is high.
TCNT clock
pulse
TCNT
N
N+1
N+2
CKS rewrite
*¹ Including a transition from low to the stopped state (CKS1 = 0, CKS0 = 0), or a transition from
the stopped state to low.
*² Including a transition from the stopped state to high.
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