HD6473258CP10 Datasheet, PDF (249/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

15.3 MCU Operational Timing
This section provides the following timing charts:
15.3.1 Bus Timing
15.3.2 Control Signal Timing
15.3.3 16-Bit Free-Running Timer Timing
15.3.4 8-Bit Timer Timing
15.3.6 SCI Timing
15.3.7 I/O Port Timing
15.3.8 Parallel Handshaking Interface Timing
Figures 15-4 to 15-6
Figures 15-7 to 15-10
Figures 15-11 to 15-12
Figures 15-13 to 15-15
Figures 15-15 to 15-17
Figure 15-18
Figures 15-19 to 15-21
15.3.1 Bus Timing
(1) Basic Bus Cycle (without Wait States) in Expanded Modes
Ø
A15 to A0
IOS
AS, RD
(Read)
D7 to D0
(Read)
WR
D7 to D0
(Write)
T1
t cyc
t CH
tCL
t AD
t Cf
T2
t Cr
t ASD
t ASI
t _ACC
t _AS2
t WSD
tWDD
t WDS
T3
t _SD
t AH
tRDS
tRDH
tWSW
t _SD
t AH
t _WDH
Figure 15-4. Basic Bus Cycle (without Wait States) in Expanded Modes
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