M16C62_M Datasheet, PDF (591/615 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

Appendix 3 Setting register for pin function selected
Mitsubishi microcomputers
M16C / 62A Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Pin name P41/A17
Function selection
A17
O Address output
P41
I Port input (No pulled high)
P41
I Port input (Pulled high)
P41
O Port output
Pin No.
53 (FP)
51 (GP)
Setting register
1,3EAh 0,3FDh 6,004h 5,004h 4,004h 1,004h 0,004h
X
X
0
Except 11
X
1
0
0
X
X
X
0
0
0
0
0
1
1
0
1
0
0
1
Except 11
X
1
0
1
X
X
X
0
0
0
1
0
1
1
0
1
0
1
1
Except 11
X
1
1
X
X
1
X
0
1
X
1
X
X
0
0
1
1
0
1
Except 11
X
1
1,3EAh Port P41 direction register
0,3FDh P40 to P43 pull-up control register
6,004h Port P40 to P43 function select bit of processor mode register 0
5,004h Multiplexed bus space select bit of processor mode register 0
4,004h Multiplexed bus space select bit of processor mode register 0
1,004h Processor mode bit of processor mode register 0
0,004h Processor mode bit of processor mode register 0
Pin name P40/A16
Function selection
A16
O Address output
P40
I Port input (No pulled high)
P40
I Port input (Pulled high)
P40
O Port output
Pin No.
54 (FP)
52 (GP)
Setting register
0,3EAh 0,3FDh 6,004h 5,004h 4,004h 1,004h 0,004h
X
X
0
Except 11
X
1
0
0
X
X
X
0
0
0
0
0
1
1
0
1
0
0
1
Except 11
X
1
0
1
X
X
X
0
0
0
1
0
1
1
0
1
0
1
1
Except 11
X
1
1
X
X
1
X
0
1
X
1
X
X
0
0
1
1
0
1
Except 11
X
1
0,3EAh Port P40 direction register
0,3FDh P40 to P43 pull-up control register
6,004h Port P40 to P43 function select bit of processor mode register 0
5,004h Multiplexed bus space select bit of processor mode register 0
4,004h Multiplexed bus space select bit of processor mode register 0
1,004h Processor mode bit of processor mode register 0
0,004h Processor mode bit of processor mode register 0
Remarks Page
1-28
1-163
1-163
1-163
1-168
1-170
1-23
1-23
1-23
1-23
1-23
Remarks Page
1-28
1-163
1-163
1-163
1-168
1-170
1-23
1-23
1-23
1-23
1-23
Pin name P37/A15
Function selection
A15
O Address output
P37
I Port input (No pulled high)
P37
I Port input (Pulled high)
P37
O Port output
Pin No.
55 (FP)
53 (GP)
Setting register
7,3E7h 7,3FCh 5,004h 4,004h 1,004h 0,004h
X
X
Except 11
X
1
0
0
X
X
0
0
0
0
1
1
0
1
0
1
0
0
0
0
0
1
1
1
0
1
1
X
0
0
0
0
1
X
0
0
0
1
7,3E7h Port P37 direction register
7,3FCh P34 to P37 pull-up control register
5,004h Multiplexed bus space select bit of processor mode register 0
4,004h Multiplexed bus space select bit of processor mode register 0
1,004h Processor mode bit of processor mode register 0
0,004h Processor mode bit of processor mode register 0
Remarks Page
1-28
1-163
1-163
1-163
1-168
1-170
1-23
1-23
1-23
1-23
2-274