M16C62_M Datasheet, PDF (426/615 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

SI/O3, 4
Mitsubishi microcomputers
M16C / 62A Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Clearing the protect (set to write-enabled state)
b7
b0 _{Protect register [Address 000A16]}
1
PRCR
Enables writing to port P9 direction register (address 03F316) and SI/Oi control register
(i=3,4) (addresses 036216 and 036616)
1 : Write-enabled
Setting SI/Oi transmit/receive control register (i=3, 4)
b7
10
10
b0 _{SI/Oi transmit/receive control register (i=3,4) [Address 036216, 036616]}
SiC(i=3,4)
Internal synchronous clock select bit
b1 b0
0 0 : f1 is selected
0 1 : f8 is selected
1 0 : f32 is selected
1 1 : Must not be set
SOUTi output disable bit
0 : SOUTi output
SI/Oi port select bit
1 : SOUTi output, CLK function
Transfer format select bit
0 : LSB first
Synchronous clock select bit
1 : Internal clock
SOUTi initial value set bit(Effective when SMi3=0)
0 : L output
1 : H output
Note 1: Be sure to set the protect register and SI/Oi control register successively.
Setting SI/Oi bit rate generator (i = 3, 4)
b7
b0
SI/Oi bit rate generator (i = 3, 4) [Address 036316, 036716]
SiBRG (i = 3, 4)
Can be set to 0016 to FF16 (Note 2)
Note 2: Write to SI/Oi bit rate generator when transmission/reception is halted.
Writing transmit data
b7
b0 SI/Oi transmit/receive register (i=3, 4) [Address 036016, 036416]
SiTRR (i=3, 4)
Setting transmission data (Note 3)
Note 3: Write to SI/Oi transmit/receive register when transmission/reception is halted.
SI/Oi interrupt
0
request bit
1
Wait for a 1/2 transfer clock period
Transfer the next data
Figure 2.6.4. Set-up procedure of transmission in SI/O3, 4 mode
2-109