M16C62_M Datasheet, PDF (447/615 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

A-D Converter
Mitsubishi microcomputers
M16C / 62A Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
2.7.9 Operation of A-D Converter (in repeat sweep mode 1)
In repeat sweep 1 mode, choose functions from those listed in Table 2.7.9. Operations of the circled items are
described below. Figure 2.7.19 shows ANi pin's sweep sequence, Figure 2.7.20 shows timing chart, and Figure
2.7.21 shows the set-up procedure.
Table 2.7.9. Choosed functions
Item
Set-up
Item
Operation clock φAD
O
Divided-by-4 fAD / divided-
by-2 fAD / fAD
Trigger for starting
A-D conversion
Resolution
Analog input pin
O 8-bit / 10-bit
Expanded analog
input pin
An0 (1 pin) / AN0 and AN1 (2
O pins) / AN0 to AN2 (3 pins) /
AN0 to AN3 (4 pins)
Sample & Hold
Set-up
O Software trigger
Trigger by ADTRG
O Not used
External ope-amp
connection mode
Not activated
O Activated
Operation
(1) Setting the A-D conversion start flag to “1” causes the A-D converter to start the conversion on voltage
input to the AN0 pin.
(2) After the A-D conversion on voltage input to the AN0 pin is completed, the content of the successive
comparison register (conversion result) is transmitted to A-D register 0.
(3) Every time the A-D converter carries out A-D conversion on a selected analog input pin, the A-D converter
carries out A-D conversion on only one unselected pin, and then the A-D converter carries out A-D conver-
sion from the AN0 pin again. (See Figure 2.7.19.) The conversion result is transmitted to A-D register i
every time conversion on a pin is completed. The A-D conversion interrupt request bit does not go to “1”.
(4) The A-D converter continues operating until software goes the A-D conversion start flag to “0”.
When AN0 is selected
Time
0 00 0 0 0 0 0 0 0
1
2
.
1
.
2.
3
4
5
6
7
When AN0, AN1 are selected
Time
0000000 0
1111111 .
.
2
2.
3
4
5
6
7
When AN0 to AN2 are selected
Time
0000000
111111 .
222222.
.
3
3
4
5
6
7
When AN0 to AN3 are selected
Time
000000
11111 .
22222 ^.
33333 ^.
4
4
5
6
7
Figure 2.7.19. ANi pin's sweep sequence in repeat sweep mode
(2) Conversion result is
transfered to A-D
(1) Start AN0 pin conversion ^{conversion register 0}
8-bit resolution :
28 φAD cycles
10-bit resolution :
33 φAD cycles
8-bit resolution :
28 φAD cycles
10-bit resolution :
33 φAD cycles
(3) Consecutive conversion
8-bit resolution :
28 φAD cycles
10-bit resolution :
33 φAD cycles
8-bit resolution :
28 φAD cycles
10-bit resolution :
33 φAD cycles
(4) A-D
conversion
is complete
φAD
A-D
conversion
“1”
start flag “0”
A-D register 0
Set to “1” by software
Result
Cleared to “0” by software
Result
A-D register 1
Result
A-D register 2
Result
Note: When φAD frequency is less than 1MHz, sample and hold function cannot be selected.
Conversion rate per analog input pin is 49 φAD cycles for 8-bit resolution and 59 φAD cycles for 10-bit resolution.
Figure 2.7.20. Operation timing of repeat sweep 1 mode
2-130