M16C62_M Datasheet, PDF (480/615 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

Key-Input Interrupt
Mitsubishi microcomputers
M16C / 62A Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Interrupt control register (Note 2)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
KUPIC
Address
004D16
When reset
XXXX00002
Bit symbol
Bit name
ILVL0
Interrupt priority level
select bit
ILVL1
ILVL2
Function
RW
b2 b1 b0
0 0 0 : Level 0 (interrupt disabled)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
IR
Interrupt request bit
0 : Interrupt not requested
1 : Interrupt requested
(Note1)
Nothing is assigned.
These bits can neither be set nor reset. When read, their contents are
indeterminate.
Note 1: This bit can only be accessed for reset (= 0), but cannot be accessed for set (= 1).
Note 2: To rewrite the interrupt control register, do so at a point that dose not generate the
interrupt request for that register. For details, see the precautions for interrupts.
Port P10 direction register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
PD10
Address
03F616
When reset
0016
Bit symbol
Bit symbol
Bit symbol
PD10_0
PD10_1
PD10_2
PD10_3
Port P100 direction register
Port P101 direction register 0 : Imput mode
Port P102 direction register
(Functions as an input port)
1 : Output mode
Port P103 direction register (Functions as an output port)
PD10_4
Port P104 direction register
PD10_5
PD10_6
Port P105 direction register
Port P106 direction register
PD10_7
Port P107 direction register
RW
Pull-up control register 2
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
PUR2
Address
03FE16
When reset
0016
Bit symbol
Bit name
PU20
P80 to P83 pull-up
PU21
PU22
P84 to P87 pull-up
(Except P85)
P90 to P93 pull-up
Function
The corresponding port is pulled
high with a pull-up resistor
0 : Not pulled high
1 : Pulled high
PU23
PU24
P94 to P97 pull-up
P100 to P103 pull-up
PU25
P104 to P107 pull-up
Nothing is assigned.
In an attempt to write to these bits, write “0”. The value, if read, turns out to be “0”.
RW
Figure 2.13.2. key-input interrupt-related registers
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