M16C62_M Datasheet, PDF (434/615 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

A-D Converter
Mitsubishi microcomputers
M16C / 62A Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Selecting Sample and hold
b7
b0
1
A-D control register 2 [Address 03D416]
ADCON2
A-D conversion method select bit
1 : With sample and hold
Setting A-D control register 0 and A-D control register 1
b7
00 00
b0
b7
A-D control register 0 [Address 03D616] _{0 0 1}
ADCON0
Analog input pin select bit (Note)
b2 b1 b0
0 0 0 : AN0 is selected
0 0 1 : AN1 is selected
0 1 0 : AN2 is selected
0 1 1 : AN3 is selected
1 0 0 : AN4 is selected
1 0 1 : AN5 is selected
1 1 0 : AN6 is selected
1 1 1 : AN7 is selected
One-shot mode is selected (Note)
Trigger select bit
0 : Software trigger
A-D conversion start flag
0 : A-D conversion disabled
Frequency select bit 0
0 : fAD/4 is selected
1 : fAD/2 is selected
Note: Rewrite to analog input pin select bit after changing A-D operation mode.
b0
A-D control register 1 [Address 03D716]
0
ADCON1
Invalid in one-shot mode
A-D operation mode select bit 1 (Note)
0 (Must always be “0” in one-shot mode)
8/10-bit mode select bit
0 : 8-bit mode
1 : 10-bit mode
Frequency select bit 1
0 : fAD/2 or fAD/4 is selected
1 : fAD is selected
Vref connect bit
1 : Vref connected
External op-amp connection mode bit
b7 b6
0 0 : ANEX0 and ANEX1 are not used
Setting A-D conversion start flag
b7
1
b0
A-D control register 0 [Address 03D616]
ADCON0
A-D conversion start flag
1 : A-D conversion started
Start A-D conversion
Stop A-D conversion
Reading conversion result
(b15)
b7
(b8)
b0 b7
A-D register 0 [Address 03C116, 03C016] AD0
A-D register 1 [Address 03C316, 03C216] AD1
b0 ^{A-D register 2 [Address 03C516, 03C416] AD2}
A-D register 3 [Address 03C716, 03C616] AD3
A-D register 4 [Address 03C916, 03C816] AD4
A-D register 5 [Address 03CB16, 03CA16] AD5
A-D register 6 [Address 03CD16, 03CC16] AD6
A-D register 7 [Address 03CF16, 03CE16] AD7
Eight low-order bits of A-D conversion result
During 10-bit mode
Two high-order bits of A-D conversion result
During 8-bit mode
When read, the content is indeterminate
Figure 2.7.6. Set-up procedure of one-shot mode
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