M16C62_M Datasheet, PDF (421/615 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

UART
Mitsubishi microcomputers
M16C / 62A Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
2.5.7 Error-permitted range range of transfer baud
During reception, the receive data input to the RXDi pin is taken at the rising edge of the transfer clock.
Accordingly, in order to receive data correctly, the stop bit must be input when the transfer clock of one-
set receive data rises last. Figure 2.5.21 shows the relationship between the transfer clock and receive
data.
<1ST-8DATA-1SP>
RxDi
(Receive data)
When the transfer rate of
the receive data is faster
than the rate of the transfer
clock on the receiver side
When the transfer rate of
the receive data is slower
than the rate of the transfer
clock on the receiver side
Transfer clock
(Receiver side)
ST
D0
ST
D0
At the falling edge of ST, the transfer clock is
generated, and reception starts.
∗ ^{1 clock}
8 clocks
9.5 clocks
∗ 1 period of BRGi's count source (Maximum)
••• According to the condition of the input timing,
a maximum of this period (∗) can be omitted.
D7
SP
D7
SP
SP must be detected at
this last rising edge of
the transfer clock.
1 clock
ST : Start bit
SP : Stop bit
Figure 2.5.21 Relationship between transfer clock and receive data
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