M16C62_M Datasheet, PDF (410/615 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

UART
Example of wiring
Microcomputer
TxD2
RxD2
Mitsubishi microcomputers
M16C / 62A Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
SIM card
Example of operation (when direct format)
(1) Transmission enabled
(2) Start transmission
Tc
(3) Confirme stop bit
(4) Start transmission
(5) Dispose
parity error
Transfer clock
Transmit
“1”
enable bit (TE) “0”
Transmit buffer ^{“1”}
empty flag (Tl)
“0”
Data is set in UART2 transmit buffer register ^{(Note 1)}
TXD2 (Note 2)
RXD2 (Note 2)
Signal line level
(Note 2)
Transmit buffer _{“1”}
empty flag
(TEXPT)
“0”
Transmit
“1”
interrupt request “0”
bit (IR)
Transferred from UART2 transmit buffer register to UART2 transmit register
Start
bit
Parity Stop
bit bit
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
ST D0 D1 D2 D3 D4 D5 D6 D7 P _SP
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
Since a parity error occurred, the
“L” level returns from TxD2
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
Detects the level
using an interrupt
routine
Detects the level
using an interrupt
routine
Cleared to “0” when interrupt request is accepted, or cleared by software
Shown in ( ) are bit symbols.
The above timing applies to the following settings :
• Parity is enabled.
• One stop bit.
Tc = 16 (n + 1) / fi
fi : frequency of BRG2 count source (f1, f8, f32)
n : value set to BRG2
• Transmit interrupt cause select bit = “1”.
Note 1: The transmit is started with overflow timing of BRG after having written in a value at the transmit buffer in the above timing.
Note 2: TxD2 and RxD2 are connected in the manner of wired OR as shown in the connection diagram. So TxD2 and RxD2 ought to
become the same signal from the logical standpoint, but the output signals turn complex, so they are shown separately. Also,
the signal level resulting from connecting TxD2 and RxD2 is shown as a signal line level.
Figure 2.5.14. Operation timing of transmission in UART mode (used for SIM interface)
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