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M16C62_M Datasheet, PDF (439/615 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES
A-D Converter
Mitsubishi microcomputers
M16C / 62A Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
2.7.5 Operation of A-D Converter (in one-shot mode, external op-amp connection mode selected)
In one-shot mode, choose functions from those listed in Table 2.7.5. Operations of the circled items are
described below. Figure 2.7.11 shows timing chart, and Figure 2.7.12 shows the set-up procedure.
Table 2.7.5. Choosed functions
Item
Set-up
Operation clock
φAD
O
Divided-by-4 fAD / divided-
by-2 fAD / fAD
Resolution
Analog input pin
Trigger for starting
A-D conversion
O 8-bit / 10-bit
O One of AN0 pin to AN7 pin
O Software trigger
Trigger by ADTRG
Item
Expanded analog
input pin
Sample & Hold
Set-up
Not used
Either ANEX0 pin or
ANEX1 pin
O External operation amplifier
connection mode
Not activated
O Activated
Operation (1) Setting the A-D conversion start flag to “1” causes voltage input to the ANi pin to be output
from the ANEX0 pin. The A-D conversion is carried out on voltage input to the ANEX1 pin
(connect an operation amplifier between the ANEX0 pin and the ANEX1 pin).
(2) After the A-D conversion is completed, the content of the successive comparison register
(conversion result) is transmitted to A-D register i corresponding to the ANi pin. At this time,
the A-D conversion interrupt request bit goes to “1”.
Example of wiring
Input voltage
Input voltage
Microcomputer
AN0
AN1
Op-amp
ANEX0
ANEX1
Example of operation
φAD
A-D conversion “1”
start flag
“0”
(1) Start A-D conversion
(2) A-D conversion is complete
8-bit resolution : 28 φAD cycles
10-bit resolution : 33 φAD cycles
Set to “1” by software
A-D register i
Result
A-D conversion “1”
interrupt request “0”
Cleared to “0” when interrupt request is accepted, or cleared by software
Note: When φAD frequency is less than 1MHZ, sample and hold function cannot be selected.
Conversion rate per analog input pin is 49 φAD cycles for 8-bit resolution and 59 φAD cycles for
10-bit resolution.
Figure 2.7.11. Operation timing of one-shot mode, with external op-amp connection mode selected
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