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M16C62_M Datasheet, PDF (405/615 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES | |||
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UART
Mitsubishi microcomputers
M16C / 62A Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
2.5.3 Operation of Serial I/O (reception in UART mode)
In receiving data in UART mode, choose functions from those listed in Table 2.5.5. Operations of the
circled items are described below. Figure 2.5.11 shows the operation timing, and Figures 2.5.12 and
2.5.13 show the set-up procedures.
Table 2.5.5. Choosed functions
Item
Set-up
Transfer clock
source
(Note 1)
RTS function
O Internal clock (f1 / f8 / f32)
External clock (CLKi pin)
O RTS function enabled
Sleep mode
(Note 1)
RTS function disabled
O Sleep mode off
Sleep mode selected
Note 1: UART0, UART1 only.
Note 2: UART2 only.
Item
Data logic select
function
(Note 2)
TXD, RXD I/O
polarity reverse bit
(Note 2)
Bus collision
detection function
(Note 2)
Set-up
O No reverse
Reverse
O No reverse
Reverse
O Not selected
Selected
Operation (1) Setting the receive enable bit to â1â readies data-receivable status. At this time, output from
________
the RTSi pin goes to âLâ level to inform the transmission side that the receivable status is
ready.
(2) When the first bit (the start bit) of reception data is received from the RxDi pin, output from the
_______
RTS goes to âHâ level. Then, data is received, bit by bit, in sequence: LSB, ····, MSB, and stop
bit(s).
(3) When the stop bit(s) is (are) received, the content of the UARTi receive register is transmitted
to the UARTi receive buffer register.
At this time, the receive complete flag goes to â1â to indicate that the reception is completed, the
_______
UARTi receive interrupt request bit goes to â1â, and output from the RTS pin goes to âHâ level.
(4) The receive complete flag goes to â0â when the lower-order byte of the UARTi buffer register
is read.
2-88
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