M16C62_M Datasheet, PDF (54/615 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

Bus Control
Mitsubishi microcomputers
M16C / 62A Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
< Separate bus (no wait) >
Bus cycle (Note 1) Bus cycle (Note 1)
BCLK
Write signal
Read signal
Data bus
Address bus (Note 2)
Chip select (Note 2)
Output
Address
Input
Address
< Separate bus (with wait) >
Bus cycle (Note 1)
Bus cycle (Note 1)
BCLK
Write signal
Read signal
Data bus
Address bus (Note 2)
Chip select (Note 2)
Output
Address
Input
Address
< Multiplexed bus >
Bus cycle (Note 1)
BCLK
Write signal
Read signal
ALE
Address bus (Note 2)
Address
Address bus/
Data bus
Address
Data output
Chip select (Note 2)
Bus cycle (Note 1)
Address
Address
Input
Note 1: These example timing charts indicate bus cycle length.
After this bus cycle sometimes come read and write cycles in succession.
Note 2: The address bus and chip select may be extended depending on the CPU status
such as that of the instruction queue buffer.
Figure 1.9.6. Typical bus timings using software wait
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