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M16C62_M Datasheet, PDF (463/615 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES
DMAC
Mitsubishi microcomputers
M16C / 62A Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
DMA0 request cause select register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
DM0SL
Address
03B816
When reset
0016
Bit symbol
DSEL0
Bit name
DMA request cause
select bit
DSEL1
DSEL2
DSEL3
Function
RW
b3 b2 b1 b0
0 0 0 0 : Falling edge of INT0 pin
0 0 0 1 : Software trigger
0 0 1 0 : Timer A0
0 0 1 1 : Timer A1
0 1 0 0 : Timer A2
0 1 0 1 : Timer A3
0 1 1 0 : Timer A4 (DMS=0)
/two edges of INT0 pin (DMS=1)
0 1 1 1 : Timer B0 (DMS=0)
Timer B3 (DMS=1)
1 0 0 0 : Timer B1 (DMS=0)
Timer B4 (DMS=1)
1 0 0 1 : Timer B2 (DMS=0)
Timer B5 (DMS=1)
1 0 1 0 : UART0 transmit
1 0 1 1 : UART0 receive
1 1 0 0 : UART2 transmit
1 1 0 1 : UART2 receive
1 1 1 0 : A-D conversion
1 1 1 1 : UART1 transmit
Nothing is assigned.
In an attempt to write to these bits, write “0”. The value, if read, turns out to be “0”.
DMS
DSR
DMA request cause
expansion select bit
Software DMA
request bit
0 : Normal
1 : Expanded cause
If software trigger is selected, a
DMA request is generated by
setting this bit to “1” (When read,
the value of this bit is always “0”)
DMA1 request cause select register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
DM1SL
Address
03BA16
When reset
0016
Bit symbol
Bit name
DSEL0
DMA request cause
select bit
DSEL1
DSEL2
DSEL3
Function
b3 b2 b1 b0
0 0 0 0 : Falling edge of INT1 pin
0 0 0 1 : Software trigger
0 0 1 0 : Timer A0
0 0 1 1 : Timer A1
0 1 0 0 : Timer A2
0 1 0 1 : Timer A3(DMS=0)
/serial I/O3 (DMS=1)
0 1 1 0 : Timer A4 (DMS=0)
/serial I/O4 (DMS=1)
0 1 1 1 : Timer B0 (DMS=0)
/two edges of INT1 (DMS=1)
1 0 0 0 : Timer B1
1 0 0 1 : Timer B2
1 0 1 0 : UART0 transmit
1 0 1 1 : UART0 receive
1 1 0 0 : UART2 transmit
1 1 0 1 : UART2 receive
1 1 1 0 : A-D conversion
1 1 1 1 : UART1 receive
Nothing is assigned.
In an attempt to write to these bits, write “0”. The value, if read, turns out to be “0”.
DMS
DSR
DMA request cause
expansion select bit
Software DMA
request bit
0 : Normal
1 : Expanded cause
If software trigger is selected, a
DMA request is generated by
setting this bit to “1” (When read,
the value of this bit is always “0”)
RW
Figure 2.9.2. DMAC-related registers (1)
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