M16C62_M Datasheet, PDF (496/615 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

Power Control
Mitsubishi microcomputers
M16C / 62A Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
2.15.3 Wait Mode Set-Up
Settings and operation for entering wait mode are described here.
Operation (1) Enables the interrupt used for returning from wait mode.
(2) Sets the interrupt enable flag (I flag) to “1”.
(3) Clears the protection and changes the content of the system clock control register.
(4) Executes the WAIT instruction.
(1) Setting interrupt to cancel wait mode
Interrupt control register
TBiIC(i=3 to 5) [Address 004516 to 004716]
BCNIC
[Address 004A16]
KUPIC
SiTIC(i=0 to 2)
SiRIC(i=0 to 2)
TAiIC(i=0 to 4)
TBiIC(i=0 to 2)
[Address 004D16]
[Address 005116, 005316, 004F16]
[Address 005216, 005416, 005016]
[Address 005516 to 005916]
[Address 005A16 to 005C16]
b7
b0
b7
0
Interrupt priority level select bit
Make sure that the interrupt priority
level of the interrupt which is used
to cancel the wait mode is higher
than the processor interrupt priority
(IPL) of the routine where the
WAIT instruction is executed.
INTiIC(i=3)
SiIC/INTjIC (i=4, 3)
(j=3, 4)
INTiIC(i=0 to 2)
b0
[Address 004416]
[Address 004816, 004916]
[Address 004816, 004916]
[Address 005D16 to 005F16]
Interrupt priority level select bit
Make sure that the interrupt priority level of the
interrupt which is used to cancel the wait mode is
higher than the processor interrupt priority (IPL) of
the routine where the WAIT instruction is executed.
Reserved bit
Must always be set to “0”
(2) Interrupt enable flag (I flag) “1”
(3) Canceling protect
b7
b0
1
Protect register [Address 000A16]
PRCR
Enables writing to system clock control registers 0 and 1
(addresses 000616 and 000716)
1 : Write-enabled
(3) Control of CPU clock
b7
b0 _{System clock control register 1}
b7
0000
[Address 000716] CM1
b0 System clock control register 0
[Address 000616] CM0
Reserved bit
Must always be set to “0”
Main clock division select bit
b7 b6
0 0 : No division mode
0 1 : Division by 2 mode
1 0 : Division by 4 mode
1 1 : Division by 16 mode
WAIT peripheral function clock stop bit (Note 2)
0 : Do not stop f1, f8, f32 in wait mode
1 : Stop f1, f8, f32 in wait mode
Port XC select bit
0 : I/O port
1 : XCIN-XCOUT generation
Main clock (XIN-XOUT) stop bit
0 : On
1 : Off
Main clock division select bit 0
0 : CM16 and CM17 valid
1 : Division by 8 mode
Note 1: When switching the system clock, it is necessary to wait for the oscillation to stabilize.
Note 2: Set the WAIT peripheral function clock stop bit to “0” when the system clock select bit is “1”.
System clock select bit (Note 1)
0 : XIN, XOUT
1 : XCIN, XCOUT
(4) WAIT instruction
Insert at least four NOPs after the WAIT instruction is executed.
Wait
Figure 2.15.6. Example of wait mode set-up
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