M16C62_M Datasheet, PDF (425/615 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

SI/O3, 4
Mitsubishi microcomputers
M16C / 62A Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
2.6.2 Operation of SI/O3,4
In transmitting data in this mode, choose functions from those listed in Table 2.6.1. Operations of the
circled items are described below. Figure 2.6.3 shows the operation timing, and Figures 2.6.4 and 2.6.5
show the set-up procedures.
Table 2.6.1. Choosed functions
Item
Set-up
Item
Set-up
Transfer clock
source
O Internal clock (f1 / f8 / f32)
External clock (CLKi pin)
SOUTi initial value
set function
O Not used
Used
Transfer clock
O LSB first
MSB first
Operation (1) Transfer begins upon writing the SI/Oi transmit data.
The transmit data is sent out from the SOUTi pin synchronously with falling edges of the
transfer clock.
(2) When SOUT finishes sending one byte of data, the interrupt request bit is set to 1.
(3) After the transfer is completed, SOUT holds the last data for a 1/2 transfer clock period before
going to a high-impedance state.
Note
• Do not write data to the SI/Oi transmit/receive register (i = 3, 4; addresses 036016, 036416)
during a transfer.
• Data can only be written to the SI/Oi transmit/receive register when the device is idle neither
sending nor receiving data.
Example of wiring
Microcomputer
CLKi
SOUTi
Receiver side IC
CLK
SIN
Example of operation
Internal clock
(1) Transmission enabled
1.5 TCLK (Max)
(2) Transmission _{(3) High-}
is complete
impedance
SI/Oi transmit/receive
register write signal
TCLK
SI/Oi output
SOUTi
CLKi
Hi-Z
D0
D1
D2
D3
D4
D5
D6
D7
SI/Oi input
SINi
SI/Oi interrupt
"1"
request bit
"0"
(i = 3, 4)
Cleared to “0” when interrupt request is accepted, or cleared by software
TCLK = 2(n + 1) / fi
fi: frequency of BRGi count source (f1, f8, f32)
n: value set to SiBRG
Figure 2.6.3. Operation timing of transmission in SI/O3, 4 mode
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