M30222 Datasheet, PDF (96/237 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

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MITSUBISHI MICROCOMPUTERS
Specifications in this manual are tentative and subject to change
M30222 Group
Rev. G
Timer Functions for Three-phase Motor Control
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Figure 1.73 shows the block diagram for three-phase waveform mode. In three-phase waveform
mode, the positive-phase waveforms (U phase, V phase, and W phase) and negative waveforms (U
phase, V phase, and W phase), six waveforms in total, are output from P80, P81, P72, P73, P74, and
P75 as active on the “L” level. Of the timers used in this mode, Timer A4 controls the U phase and U
phase, timer A1 controls the V phase and V phase, and Timer A2 controls the W phase and W phase
respectively; Timer B2 controls the periods of one-shot pulse output from Timers A4, A1, and A2.
In outputting a waveform, dead time can be set so as to cause the “L” level of the positive waveform
output (U phase, V phase, and W phase) not to lap over the “L” level of the negative waveform output
(U phase, V phase, and W phase).
To set the dead time, use three 8-bit timers sharing the reload register. A value from 1 through 255
can be set as the count of the timer for setting dead time. The timer for setting dead time works as a
one-shot timer. If a value is written to the timer (034C16), the value is written to the reload register
shared by the three timers for setting dead time.
Any of the timers for setting dead time takes the value of the reload register into its counter, if a start
trigger comes from its corresponding timer, and performs a down count in line with the clock source
selected by the dead time timer count source select bit (bit 2 at 034916). The timer can receive another
trigger again before the count from the previous trigger is completed. In this instance, the timer re-
loads the reload register's contents aand starts the down count again.
Because the timer for setting dead time works as a one-shot timer, it starts outputting pulses if trig-
gered; it stops outputting pulses as soon as its content becomes 0016, and waits for the next trigger.
The positive waveforms (U phase, V phase, and W phase) and the negative waveforms (U phase, V
phase, and W phase) in three-phase waveform mode are output from respective ports by means of
setting “1” in the output control bit (bit 3 at 034816). Setting “0” in this bit causes the ports to return to
a general purpose I/O port. This bit can be set to “0” by use of the applicable instruction, entering a
falling edge in the NMI terminal, or by resetting. Also, if “1” is set in the positive and negative phases
concurrently, the L output disable function enable bit (bit 4 at 034816) causes one of the pairs of U
phase and U phase, V phase and V phase, and W phase and W phase to go to “L”. As a result, the port
becomes the state set by the port direction register.
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