M30222 Datasheet, PDF (112/237 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

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Specifications in this manual are tentative and subject to change
MITSUBISHI MICROCOMPUTERS
M30222 Group
Rev. G
Serial Communications
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
UART2 special mode register 2
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
U2SMR2
Address
037616
When reset
0016
Bit
symbol
Bit name
IICM2 I²C mode selection bit 2
Function
Refer to Table 1.44
CSC Clock-synchronous bit
SWC SCL wait output bit
ASL SDA output stop bit
STAC ^{UART2 initialization bit}
SWC2 SCL wait output bit 2
SDHI ^{SDA output disable bit}
SHTC Start/stop condition
control bit
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
0: UART2 clock
1: 0 output
0: Enabled
1: Disabled (high impedance)
Set this bit to "1" in I ²C mode
RW
UART2 Special mode register 3 (I²C and SPI bus exclusive use register)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
U2SMR3
Address
037516
When reset
0016
Bit symbol
SPIM
CPHA
Bit name
SPI mode select bit
SPI clock-phase
select bit
Function during clock
synchronous serial I/O mode
0 : Normal mode
1 : SPI mode
0 : Data latched on
falling clock edge
1 : Data latched on
rising clock edge
Function during _{R W}
UART mode
Must always be "0'
Must always be "0'
Nothing is assigned. Write "0" when writing to these bits. If read, the value is
Indeterminate. However, when SDDS = "1", a "0" value is read. (Note 1)
__
b7 b6 b5
DL0
SDA digital delay _{0 0 0 : Analog delay is selected}
set up bit (Notes 0 0 1 : 2 cycle of 1/f(X IN)
1, 2, 3, 4, 5)
0 1 0 : 3 cycle of 1/f(X IN)
DL1
0 1 1 : 4 cycle of 1/f(X IN)
Digital delay
1 0 0 : 5 cycle of 1/f(X IN)
1 0 1 : 6 cycle of 1/f(X IN)
is selected
DL2
1 1 0 : 7 cycle of 1/f(X IN)
1 1 1 : 8 cycle of 1/f(X IN)
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
This bit can be read or written to when UART2 special mode register U2SMR at address 037716 bit 7
(SDDS: SDA digital delay select bit) = "1". When the initial value of UART2 special mode register 3
(U2SMR3 is read after setting SDDS = "1", the value is "0016". When writing to U2SMR3 after setting
SDDS = "1", be sure to write 0s to bits 0 - 4. When SDDS = "0", This register cannot be written to;
when read, the value is indeterminate.
These bits are initialized to "000" when SDDS = "0", with the analog delay circuit selected. After a reset
these bits are set to "000", with the analog delay circuit selected. However, because these bits can be read
only when SDDS = "1", the value read from these bits when SDDS = "0" is indeterminate.
When analog delay is selected, only the analog delay value is effective; when digital delay is selected,
only the digital delay value is effective.
The amount of delay varies with the load on SCL and SDA pins. Also, when using an external clock,
the amount of delay increases by about 100ns. Be sure to take this into account when using this device.
Reset values for SPIM and CPHA are not affected by the state of SDDs. Their reset values are always "0".
Fig. 1.86. Serial I/O-related registers (6)
1-113