M30222 Datasheet, PDF (33/237 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

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Specifications in this manual are tentative and subject to change
MITSUBISHI MICROCOMPUTERS
M30222 Group
Rev. G
Software Wait
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Software wait
A software wait can be inserted by setting the wait bit (bit 7) of the processor mode register 1 (address
000516) (Note) and bits 4 to 7 of the chip select control register (address 000816).
A software wait is inserted in the internal ROM/RAM area by setting the wait bit of the processor mode
register 1. When set to “0”, each bus cycle is executed in one BCLK cycle. When set to “1”, each bus
cycle is executed in two or three BCLK cycles. After the microcomputer has been reset, this bit defaults
to “0”. When set to “1”, a wait is applied to all memory areas (two or three BCLK cycles), regardless of
the contents of bits 4 to 7 of the chip select control register. Set this bit after referring to the recom-
mended operating conditions (main clock input oscillation frequency) of the electric characteristics.
The SFR area is always accessed in two BCLK cycles regardless of the setting of these control bits.
Table 1.16 shows the software wait and bus cycles.
Note: Before attempting to change the contents of the processor mode register 1, set bit 1 of the protect
register (address 000A16) to “1”.
Table 1.16. Software wait and bus cycles
Area
SFR
Internal
ROM/RAM
Wait bit
Invalid
0
1
Bus cycle
2 BCLK cycles
1 BCLK cycle
2 BCLK cycles
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