M30222 Datasheet, PDF (198/237 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

dUevnedloerpment
Specifications in this manual are tentative and subject to change
MITSUBISHI MICROCOMPUTERS
M30222 Group
Rev. G
CPU Rewrite Mode (Flash Memory Version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Over Write Back Status (SR2)
The over write back status informs the operating status of the write back operation during an erase sequence.
When a write back error occurs, SR5 and SR2 are set to "1".
The over write back status is reset to "0" when cleared.
Over Erase Status (SR1)
The over erase status informs the operating status of the erase operation during an erase sequence. When an
erase error occurs, SR5 and SR1 are set to "1". The over erase status is reset to "0" when cleared.
If SR5 or SR4 bits = "1", the program, erase all blocks, and block erase commands are not accepted. Before
executing these commands, execute the clear status register command (5016) and clear the status register. Bits
SR2 and SR1 give more information on the reason for failure.
Also, if any commands are not correct, both SR5 and SR4 are set to 1.
Full Status Check
By performing full status check, it is possible to know the execution results of erase and program operations.
Figure 1.157 shows a full status check flowchart and the action to be taken when each error occurs.
Read status register
YES
SR4=1 and SR5
=1 ?
Command
sequence error
NO
SR5=0? ^{NO Block erase error}
YES
SR4=0?
NO _{Program error (page}
or lock bit)
YES
Execute the clear status register command (50 16)
to clear the status register. Try performing the
operation one more time after confirming that the
command is entered correctly.
Should a block erase error occur, the block in error
cannot be used.
If an error occurs, the block in error cannot be
used.
End (block erase, program)
Note: When one of SR5 to SR4 is set to 1, none of the page program, block erase, or erase all
blocks commands is accepted. Execute the clear status register command (5016) before
executing these commands.
Fig. 1.157 Full status check flowchart and remedial procedure for errors
1-199