M30222 Datasheet, PDF (65/237 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

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Specifications in this manual are tentative and subject to change
MITSUBISHI MICROCOMPUTERS
M30222 Group
Rev. G
Direct Memory Access Controller
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(2) DMAC transfer cycles
Any combination of even or odd transfer read and write addresses is possible. Table 1.24 shows the
number of DMAC transfer cycles. The number of DMAC transfer cycles can be calculated as follows:
No. of transfer cycles per transfer unit = No. of read cycles x j + No. of write cycles x k
Table 1.24. No. of DMAC transfer cycles
Transfer unit
Bus width
8-bit transfers
(DMBIT= “1”)
16-bit transfers
(DMBIT= “0”)
16-bit
(BYTE= “L”)
16-bit
(BYTE = “L”)
Access
address
Even
Odd
Even
Odd
No. of read
cycles
1
1
1
2
No. of write
cycles
1
1
1
2
Coefficient j, k
Internal memory
Internal ROM/RAM
No Wait
Internal ROM/RAM
With Wait
SFR area
1
2
2
1-66