M30222 Datasheet, PDF (38/237 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

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Specifications in this manual are tentative and subject to change
MITSUBISHI MICROCOMPUTERS
M30222 Group
Rev. G
Overview of Interrupts
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
• Variable vector tables
The addresses in the variable vector table can be modified, according to the user’s settings. Before enabling
interrupts, the user msut load the INTB register with the address of the first entry in the table. The 256-byte
area subsequent to the address the INTB indicates becomes the area for the variable vector tables. One
vector table comprises four bytes. Set the first address of the interrupt routine in each vector table. Table
1.18 shows the interrupts assigned to the variable vector tables and addresses of vector tables. shows the
interrupts assigned to the variable vector tables and addresses of vector tables.
Table 1.18. Interrupts assigned to the variable vector tables and addresses of vector tables
Software interrupt number
Software interrupt number 0
~~
Software interrupt number 4
Software interrupt number 5
Software interrupt number 6
Software interrupt number 7
Software interrupt number 8
Software interrupt number 9
Software interrupt number 10
Software interrupt number 11
Software interrupt number 12
Software interrupt number 13
Software interrupt number 14
Software interrupt number 15
Software interrupt number 16
Software interrupt number 17
Software interrupt number 18
Software interrupt number 19
Software interrupt number 20
Software interrupt number 21
Software interrupt number 22
Software interrupt number 23
Software interrupt number 24
Software interrupt number 25
Software interrupt number 26
Software interrupt number 27
Software interrupt number 28
Software interrupt number 29
Software interrupt number 30
Software interrupt number 31
Software interrupt number 32
to
Software interrupt number 63
Vector table address
Address (L) to address (H)
+0 to +3 (Note 1)
Interrupt source
BRK instruction
+16 to +19 (Note 1)
+20 to +23 (Note 1)
+24 to +27 (Note 1)
+28 to +31 (Note 1)
+32 to +35 (Note 1)
+36 to +39 (Note 1)
+40 to +43 (Note 1)
+44 to +47 (Note 1)
+48 to +51 (Note 1)
+52 to +55 (Note 1)
+56 to +59 (Note 1)
+60 to + 63 (Note 1)
+64 to +67 (Note 1)
+68 to +71 (Note 1)
+72 to +75 (Note 1)
+76 to +79 (Note 1)
+80 to +83 (Note 1)
+84 to +87 (Note 1)
+88 to +91 (Note 1)
+92 to +95 (Note 1)
+96 to +99 (Note 1)
+100 to +103 (Note 1)
+104 to +107 (Note 1)
+108 to +111 (Note 1)
+112 to +115 (Note 1)
+116 to +119 (Note 1)
+120 to +123 (Note 1)
+124 to +127 (Note 1)
+128 to +131 (Note 1)
to
+252 to +255 (Note 1)
INT3 / SIO4 (Note 3)
Timer B5
Timer B4
Timer B3
INT7
INT6
Bus collision detection
DMA0
DMA1
Key input interrupt
A-D
UART2 transmit (Note 2)
UART2 receive (Note 2)
UART0 transmit
UART0 receive
UART1 transmit
UART1 receive
Timer A0
Timer A1
Timer A2
Timer A3/ INT4 (Note 3)
Timer A4 / INT5 (Note 3)
Timer B0
Timer B1
Timer B2
INT0
INT1
INT2 / SIO3 (Note 3)
Software interrupt
Note 1: Address relative to address in interrupt table register (INTB).
Note 2: When IIC mode is selected, NACK and ACK interrupts are selected.
Note 3: Selected by Interrupt Request Cause Select bit (bits 4, 5, 6, 7 at address 035F16)
1-39
Remarks
Not masked by I flag
~~
Not masked by I flag